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i EEE434L VLSI Design Lab Lab Manual LAB 1 BEHAVIORAL DESIGN AND SIMULATION OF COMPLETE 8-BIT ADDER IN XILINX ISE Objective The objective of this experiment is to develop familiarity with an HDL Design and Simulation Tool and to learn behavioral level HDL programming by designing an important simple component of Digital Integrated Circuits.

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B.E Electronics & Communication Engineering / Telecommunication Engineering (Common to Electronics & Communication and Telecommunication Engineering) III SEMESTER Sl. No Subject Code Title Teaching Hours /Week Examination 8 15ECL58 HDL Lab 1I+2P 03 80 20 100 2 TOTAL 22 06 24 640 160 800 26

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